presentation of different fine pitch interconnection technologies developed for optic applications
| Description | |
| Date | 2018 |
| Date | |
| Auteurs | Gilles,- L | Chambion,- B | Marion,- V | Frederic,- B | Divya,- T | David,- H | |
| Source | 7th Electronic System-Integration Technology Conference, ESTC 2018 |
| Résumé | The growing interest for megapixels arrays optical devices (detecting array/emitting array) has highlighted the need for high pixel count and fine pitch interconnection. The LA2P laboratory developed different interconnection technologies in order to optimize the assembly process of optical device. First this paper present the different technologies developed by First, and theory is proposed that shows that the size limitation of 'emitting' or 'imaging' flip-chipped devices depends on deltaCTE and is independent on the pixel's pitch. Then, mechanical simulation are presented showing the constraint in interconnection technologies. To finish a room-temperature flip-chip consisting on the insertion of Gold capped micro-tubes inside soft Indium pads is presented with mechanical assembly for reliability tests and infrared demonstrator. This assembly process show the possibility to override limitations given by standard or production interconnection assembly process. © 2018 IEEE. |
| DOI | http://dx.doi.org/10.1109/ESTC.2018.8546364 |
| Type de documents | |
| Impact Factor | |